sPyNNaker neural_modelling 7.3.1
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matrix_generator_common.h
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1/*
2 * Copyright (c) 2017 The University of Manchester
3 *
4 * Licensed under the Apache License, Version 2.0 (the "License");
5 * you may not use this file except in compliance with the License.
6 * You may obtain a copy of the License at
7 *
8 * https://www.apache.org/licenses/LICENSE-2.0
9 *
10 * Unless required by applicable law or agreed to in writing, software
11 * distributed under the License is distributed on an "AS IS" BASIS,
12 * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
13 * See the License for the specific language governing permissions and
14 * limitations under the License.
15 */
16
24#ifndef __MATRIX_GENERATOR_COMMON_H__
25#define __MATRIX_GENERATOR_COMMON_H__
26
27#include <debug.h>
28
30#define N_HEADER_WORDS 3
31
36 uint16_t delay;
37 uint16_t stage;
38};
39
47static struct delay_value get_delay(
48 uint16_t delay_value, uint32_t max_stage,
49 uint32_t max_delay_per_stage) {
50 uint16_t delay = delay_value;
51
52 // Ensure delay is at least 1
53 if (delay < 1) {
54 log_debug("Delay of %u is too small", delay);
55 delay = 1;
56 }
57
58 // Ensure that the delay is less than the maximum
59 uint16_t stage = (delay - 1) / max_delay_per_stage;
60 if (stage >= max_stage) {
61 log_debug("Delay of %u is too big", delay);
62 stage = max_stage - 1;
63 delay = (stage * max_delay_per_stage);
64 }
65
66 // Get the remainder of the delay
67 delay = ((delay - 1) % max_delay_per_stage) + 1;
68 return (struct delay_value) {.delay = delay, .stage = stage};
69}
70
80static void *get_row(uint32_t *synaptic_matrix, uint32_t max_row_n_words,
81 uint32_t pre_index) {
82 uint32_t idx = pre_index * (max_row_n_words + N_HEADER_WORDS);
83 return &synaptic_matrix[idx];
84}
85
99static void *get_delay_row(uint32_t *delayed_synaptic_matrix,
100 uint32_t max_delayed_row_n_words, uint32_t pre_index, uint32_t delay_stage,
101 uint32_t n_pre_neurons_per_core, uint32_t max_delay_stage, uint32_t n_pre_neurons) {
102 // Work out which core the pre-index is on
103 uint32_t core = 0;
104 uint32_t remaining_pre_neurons = n_pre_neurons;
105 while (((core + 1) * n_pre_neurons_per_core) < pre_index) {
106 core++;
107 remaining_pre_neurons -= n_pre_neurons_per_core;
108 }
109
110 // Get the core-local pre-index
111 uint32_t local_pre_index = pre_index - (core * n_pre_neurons_per_core);
112
113 // Find the number of neurons on *this* core, which might be the last core
114 // (and therefore have less of them)
115 uint32_t n_neurons_on_core = n_pre_neurons_per_core;
116 if (remaining_pre_neurons < n_pre_neurons_per_core) {
117 n_neurons_on_core = remaining_pre_neurons;
118 }
119
120 // Work out the *delay* neurons per pre-delay-core
121 uint32_t n_delay_neurons_per_core = n_pre_neurons_per_core * (max_delay_stage - 1);
122
123 // With these we can now work out the number of rows associated with all the
124 // previous cores, and the delay row index for this core
125 uint32_t delay_core_index = core * n_delay_neurons_per_core;
126 uint32_t delay_local_index = ((delay_stage - 1) * n_neurons_on_core) + local_pre_index;
127
128 // That then finally gives us the delay pre-row
129 uint32_t pre_row = delay_core_index + delay_local_index;
130 uint32_t idx = pre_row * (max_delayed_row_n_words + N_HEADER_WORDS);
131 return &delayed_synaptic_matrix[idx];
132}
133
134
135#endif // __MATRIX_GENERATOR_COMMON_H__
void log_debug(const char *message,...)
#define N_HEADER_WORDS
The number of header words per row.
static struct delay_value get_delay(uint16_t delay_value, uint32_t max_stage, uint32_t max_delay_per_stage)
Get a converted delay value and stage.
static void * get_delay_row(uint32_t *delayed_synaptic_matrix, uint32_t max_delayed_row_n_words, uint32_t pre_index, uint32_t delay_stage, uint32_t n_pre_neurons_per_core, uint32_t max_delay_stage, uint32_t n_pre_neurons)
Get a delayed synaptic row for a given neuron and delay stage.
static void * get_row(uint32_t *synaptic_matrix, uint32_t max_row_n_words, uint32_t pre_index)
Get a synaptic row for a given neuron.
A converted final delay value and delay stage.