spinnaker_tools (BMP) 3.4.0
SpiNNaker BMP firmware
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Header file for Spin4/Spin5 Board Management Processor (BMP, LPC1768) More...
#include <stdint.h>
#include <stdbool.h>
Go to the source code of this file.
Data Structures | |
struct | iptag_t |
IPTag entry (24 bytes) More... | |
struct | sdp_msg_t |
SDP message type definition. More... | |
struct | fl_dir_t |
Flash directory entry. More... | |
struct | ee_data_t |
Data read from EEPROM. More... | |
struct | board_stat_t |
Board status. More... | |
struct | ip_data_t |
Information about an IP address. More... | |
struct | cortex_vec_t |
Cortex master vector. More... | |
struct | boot_vec_t |
Boot vector. More... | |
struct | event_t |
Record of how to handle an event. More... | |
Macros | |
#define | BMP_VER_STR "2.1.2" |
SpiNNaker BMP Version: string. | |
#define | BMP_VER_NUM 0x020102 |
SpiNNaker BMP Version: BCD. | |
#define | BMP_ID_STR "BC&MP/Spin5-BMP" |
SpiNNaker BMP software identifier. | |
#define | CCLK 100000000 |
CPU clock - 100 MHz. | |
#define | NULL 0 |
Null pointer. | |
#define | LED_MASK (LED_0 + LED_1 + LED_2 + LED_3 + LED_4 + LED_5 + LED_6 + LED_7) |
Mask for LED control bits. | |
#define | NUM_FPGAS 3 |
Number of FPGAs available (on SpiNN-5 board) | |
#define | IO_STD ((char *) 0) |
IO stream that goes immediately to host (tubotron) | |
#define | IO_DBG ((char *) 1) |
IO stream for debugging. | |
#define | IO_LCD ((char *) 2) |
IO stream that goes to the LCD panel. | |
#define | IO_NULL ((char *) 3) |
IO stream that gets dumped. | |
#define | LCD_POS(x, y) (0x80 + (y) * 64 + (x)) |
LCD cursor position to motion control byte encoder. | |
#define | FL_DIR_SIZE 16 |
Number of fl_dir entries. | |
#define | UNI_VEC_SIZE 8 |
Size of uni_vec, in words. | |
#define | DBG_VEC_SIZE 16 |
Size of dbg_vec, in words. | |
#define | CAN_SIZE 24 |
Number of boards that can be managed over the CAN bus. | |
Typedefs | |
typedef void(* | LPC_IAP) (uint32_t *cmd, uint32_t *res) |
LPC17xx In-Application Programming entry point. | |
Enumerations | |
enum | bmp_led_code { LED_0 = (1 << 4) , LED_1 = (1 << 5) , LED_2 = (1 << 19) , LED_3 = (1 << 20) , LED_4 = (1 << 21) , LED_5 = (1 << 22) , LED_6 = (1 << 29) , LED_7 = (1 << 30) } |
Encoding of LED control bits. More... | |
enum | bmp_gpio_bits { SF_NCS = (1 << 16) , XFSEL_0 = (1 << 25) , XFSEL_1 = (1 << 26) , XFSEL_2 = (1 << 29) } |
Miscellaneous GPIO bits. More... | |
enum | bmp_fpga_command { FPGA_READ = 0 , FPGA_WRITE = 1 } |
Directions for fpga_word() More... | |
enum | bmp_fl_dir_type { FL_BMP_IP = 1 , FL_SPIN_IP = 2 , FL_FPGA = 3 , FL_XREG = 4 } |
Values in fl_dir->type. | |
enum | bmp_proc_opcodes { PROC_RESET = 0 , PROC_POWER = 1 , PROC_LED = 2 } |
Commands that can be invoked over CAN. More... | |
enum | bmp_power_status_commands { POWER_ON = 2 , POWER_OFF = 0 , POWER_SHUT = 1 } |
Functions | |
bmp_i2c.c | |
void | configure_i2c (void) |
Set up I2C0 and I2C2 - 25MHz PCLK. | |
uint32_t | i2c_poll (LPC_I2C_TypeDef *restrict i2c, uint32_t ctrl) |
Poll an I2C port. | |
uint32_t | i2c_receive (LPC_I2C_TypeDef *restrict i2c, uint32_t ctrl, uint32_t addr, uint32_t length, void *buf) |
Receive a buffer over I2C. | |
uint32_t | i2c_send (LPC_I2C_TypeDef *restrict i2c, uint32_t ctrl, uint32_t addr, uint32_t length, const void *buf) |
Send a buffer over I2C. | |
int16_t | read_ts (LPC_I2C_TypeDef *restrict i2c, uint32_t addr) |
Read temperature sensor. | |
uint32_t | read_ee (uint32_t addr, uint32_t count, void *buf) |
Read from EEPROM. | |
uint32_t | write_ee (uint32_t addr, uint32_t count, const void *buf) |
Write to EEPROM. | |
void | configure_lcd (void) |
Configure the LCD. | |
void | lcd_ctrl (uint32_t c) |
Write a control byte to the LCD. | |
void | lcd_putc (uint32_t c) |
Write a character to the LCD. Buffers. | |
bmp_hw.c | |
void | clock_div (uint32_t bit_pos, uint32_t value) |
Configure clock division. | |
void | delay_us (uint32_t n) |
Delay using a busy loop. | |
void | delay_ms (uint32_t n) |
Delay using a busy loop. | |
void | configure_hw (void) |
Configure the BMP hardware. | |
void | read_adc (void) |
Read voltage from an ADC (directly into board_stat_t::adc) and start the read of the next ADC. | |
void | read_temp (void) |
Read I2C temperature sensors and also compute the fan speed. | |
void | read_fans (void) |
Count transitions on the fan sensor inputs. | |
void | set_power (uint32_t state) |
Turn board off or on. | |
void | reset_spin (uint32_t code) |
Resets SpiNNaker by raising/lowering POR and switching the Serial Flash multiplexer as needed when POR falls. | |
void | fpga_reset (uint32_t code) |
Reset the FPGAs. | |
uint32_t | fpga_init (uint32_t mask) |
Initialise FPGAs. | |
void | refresh_wdt (void) |
Refresh the watchdog timer so that the watchdog doesn't bark. | |
void | led_set (uint32_t leds) |
Control the LEDs. | |
void | ssp0_pins (uint32_t on) |
Set up GPIO pins that talk to Flash. | |
uint32_t | cpu_int_off (void) |
Disable interrupts. | |
void | cpu_int_restore (uint32_t cpsr) |
Restore interrupts. | |
bmp_flash.c | |
uint32_t | is_blank (const void *buf, uint32_t len) |
Check if an area of memory is blank (filled with 0xFF ) | |
uint32_t | flash_sector (uint32_t addr) |
Convert flash address to sector number (LPC17xx specific) | |
uint32_t | flash_write (uint32_t addr, uint32_t length, const uint32_t *buffer) |
Write to flash from supplied buffer. Only writes one sector. | |
uint32_t | flash_erase (uint32_t start, uint32_t end) |
Erase sectors given start and end (byte) addresses. | |
bmp_clock.c | |
void | configure_clocks (void) |
Configure the clocks. | |
bmp_cmd.c | |
void | flash_buf_init (void) |
Initialise flash_buf. | |
void | proc_power (uint32_t arg1, uint32_t arg2) |
Control power for this board; calls set_power() (and sf_scan() and reset_spin() if powering on) | |
void | proc_reset (uint32_t arg1, uint32_t arg2) |
Board reset handler; calls reset_spin() | |
void | proc_led (uint32_t arg1, uint32_t arg2) |
Control the LEDs on this board; call led_set() | |
uint32_t | debug (sdp_msg_t *) |
SDP message dispatcher. | |
bmp_net.c | |
void | eth_receive (void) |
Receive a packet off the ethernet hardware. | |
void | copy_ip_data (void) |
Copy IP address data from Flash (bmp_flash_ip and spin_flash_ip) | |
void | iptag_timer (void) |
IPTag timeout tick. Called from proc_100hz() every 10ms. | |
void | copy_ip (const uint8_t *restrict f, uint8_t *restrict t) |
Copy IP address. | |
void | arp_lookup (iptag_t *iptag) |
Request an ARP lookup. | |
uint32_t | iptag_new (void) |
Allocate a transient IPTag. | |
void | msg_init (void) |
Initialise the message queue. | |
sdp_msg_t * | msg_get (void) |
"Allocate" a message from the free message pool | |
uint32_t | msg_queue_size (void) |
How big is the message queue? | |
uint32_t | msg_queue_insert (sdp_msg_t *msg) |
Insert a message in the message queue. | |
sdp_msg_t * | msg_queue_remove (void) |
Get a message from the head of the message queue and remove it from the queue. | |
void | route_msg (sdp_msg_t *msg) |
Route a message to its destination. | |
bmp_eth.c | |
uint32_t | eth_rx_rdy (void) |
Is the ethernet hardware ready to receive? | |
uint32_t | eth_tx_rdy (void) |
Is the ethernet hardware ready to transmit? | |
uint32_t | eth_rx_size (void) |
Get size of received data. | |
void | eth_update_tx (void) |
Select the next transmission buffer. | |
void | eth_rx_discard (void) |
Discard received packet, releasing buffer for reuse. | |
void | eth_copy_txbuf (uint32_t *buffer, uint32_t length) |
Copy supplied buffer into transmit hardware. | |
void | eth_copy_rxbuf (uint32_t *buffer, uint32_t length) |
Copy received message into supplied buffer. | |
void | configure_eth (const uint8_t *mac_addr) |
Configure the ethernet hardware. | |
bmp_can.c | |
void | configure_can (uint32_t id) |
Initialises the CAN controller. | |
uint32_t | can_send_msg (uint32_t dest, sdp_msg_t *msg) |
Send an SDP message over the CAN. | |
void | can_timer (void) |
This is called every 10ms on all boards. | |
void | can_proc_cmd (uint32_t dest, uint32_t op, uint32_t arg1, uint32_t arg2) |
Asks another BMP to run a proc from proc_list. | |
bmp_crc.c | |
uint32_t | crc32 (void *buf, uint32_t len, uint32_t crc) |
Compute CRC32 for a buffer of given length. | |
uint32_t | crc32_chk (void *buf, uint32_t len) |
Compute the CRC of a buffer. | |
void | crc32_buf (void *buf, uint32_t len) |
Compute and insert CRC32 of a buffer where the CRC is placed in the last 4 bytes. | |
bmp_io.c | |
void | io_printf (char *stream, char *f,...) |
Print to an output stream. | |
bmp_ssp.c | |
void | configure_ssp (void) |
Configure SSP (serial flash, FPGAs) | |
void | ssp1_fast (void) |
Configure SSP1 to be fast. | |
void | ssp1_slow (void) |
Configure SSP1 to be slow. | |
void | ssp0_read (uint32_t cmd, uint32_t addr, uint32_t len, uint8_t *buf) |
Read buffer from Serial Flash. | |
void | ssp0_write (uint32_t cmd, uint32_t addr, uint32_t len, const uint8_t *buf) |
Write buffer to Serial Flash. | |
void | ssp0_copy (uint32_t addr, uint32_t len) |
Copy from Serial Flash on SSP0 to FPGA(s) on SSP1. | |
void | ssp1_copy (uint32_t count, const uint8_t *buf) |
Copy buffer to FPGAs. | |
void | sf_read (uint32_t addr, uint32_t len, uint8_t *buf) |
Read from flash. | |
void | sf_write (uint32_t addr, uint32_t len, const uint8_t *buf) |
Write to flash. | |
uint32_t | sf_crc32 (uint32_t addr, uint32_t len) |
Compute CRC of data on flash. | |
void | fpga_word (uint32_t addr, uint32_t fpga, uint32_t *buf, uint32_t dir) |
Read or write an FPGA. | |
Variables | |
static fl_dir_t *const | fl_dir = (fl_dir_t *) 0x1000 |
Address in Flash of Flash directory. | |
static ip_data_t *const | bmp_flash_ip = (ip_data_t *) 0x1020 |
Address in Flash of BMP IP address. | |
static ip_data_t *const | spin_flash_ip = (ip_data_t *) 0x10a0 |
Address in Flash of SpiNNaker base IP address. | |
static LPC_IAP const | lpc_iap = (LPC_IAP) 0x1fff1ff1 |
LPC17xx In Application Programming entry point. | |
static uint32_t *const | flash_buf = (uint32_t *) 0x10000000 |
4096 byte buffer used for writing to Flash and as a general purpose buffer | |
static uint32_t *const | uni_vec = (uint32_t *) 0x10001000 |
32 byte (8 word) uninitialised vector | |
static uint32_t *const | dbg_vec = (uint32_t *) 0x10001020 |
64 byte (16 word) uninitialised fault debug vector | |
uint8_t | can_ID |
CAN ID (from backplane) | |
uint8_t | board_ID |
Board ID (devived from can_ID) | |
bool | bp_ctrl |
Backplane controller. | |
bool | fan_sense |
Compute fan speed. | |
uint8_t | power_state |
Power supply state. | |
ip_data_t | spin_ip |
IP address of the board we manage. | |
ip_data_t | bmp_ip |
Our own IP address. | |
uint8_t | can_status [CAN_SIZE] |
Whether a particular board is talking to the CAN bus. | |
board_stat_t | board_stat [CAN_SIZE] |
Board status. | |
ee_data_t | ee_data |
Copy of EEPROM data. | |
bool | lcd_active |
Whether the LCD is active; if not, nothing should be sent to the LCD. | |
uint32_t | boot_sec |
Boot block number. | |
uint32_t | up_time |
const uint8_t * | can2board |
Mapping from CAN ID to board number. | |
const uint8_t * | board2can |
Mapping from board number to CAN ID. | |
bool | data_ok |
Data sector CRC OK. | |
iptag_t | tag_table [] |
The table of IPTags. | |
const uint32_t | hw_ver |
Hardware version. | |
SDP | |
#define | BOARD_MASK 31 |
How to mask off the board bits. | |
#define | FLASH_BYTES 4096 |
Size of flash buffer (bytes) | |
#define | FLASH_WORDS 1024 |
#define | PORT_SHIFT 5 |
Where the port is in the SDP port/board word. | |
#define | PORT_MASK 7 |
How to mask off the port bits. | |
#define | BOARD_MASK 31 |
How to mask off the board bits. | |
#define | PORT_ETH (7 << PORT_SHIFT) |
SDP port for Ethernet traffic. | |
#define | SDP_BUF_SIZE 256 |
Size of user data area of SDP message. | |
enum | bmp_commands { CMD_VER = 0 , CMD_RUN = 1 , CMD_READ = 2 , CMD_WRITE = 3 , CMD_FILL = 5 , CMD_FPGA_READ = 17 , CMD_FPGA_WRITE = 18 , CMD_LED = 25 , CMD_IPTAG = 26 , CMD_BMP_INFO = 48 , CMD_FLASH_COPY = 49 , CMD_FLASH_ERASE = 50 , CMD_FLASH_WRITE = 51 , CMD_BMP_SF = 53 , CMD_BMP_EE = 54 , CMD_RESET = 55 , CMD_XILINX = 56 , CMD_POWER = 57 , CMD_BMP_I2C = 61 , CMD_BMP_PWM = 62 , CMD_TUBE = 64 } |
Commands supported by the BMP. More... | |
enum | bmp_type_code { TYPE_BYTE = 0 , TYPE_HALF = 1 , TYPE_WORD = 2 } |
Data transfer unit. More... | |
enum | bmp_return_code { RC_OK = 0x80 , RC_LEN = 0x81 , RC_SUM = 0x82 , RC_CMD = 0x83 , RC_ARG = 0x84 , RC_PORT = 0x85 , RC_TIMEOUT = 0x86 , RC_ROUTE = 0x87 , RC_CPU = 0x88 } |
SDP return codes. More... | |
IPTAG definitions | |
#define | IPTAG_MAX 4 |
Max operation code in bmp_iptag_commands. | |
#define | TAG_NONE 255 |
Invalid tag/transient request. | |
#define | TAG_HOST 0 |
Reserved for host. | |
#define | TAG_FIXED_SIZE 8 |
Number of user-controllable IPTags. | |
#define | TAG_POOL_SIZE 8 |
Number of transient IPTags. | |
#define | FIRST_POOL_TAG TAG_FIXED_SIZE |
Index of first transient IPTag. | |
#define | LAST_POOL_TAG (TAG_FIXED_SIZE + TAG_POOL_SIZE - 1) |
Index of last transient IPTag. | |
#define | TAG_TABLE_SIZE (TAG_FIXED_SIZE + TAG_POOL_SIZE) |
Size of the table of IPTags. | |
#define | SDPF_REPLY 0x80 |
SDP flag bit: reply desired. | |
enum | bmp_iptag_commands { IPTAG_NEW = 0 , IPTAG_SET = 1 , IPTAG_GET = 2 , IPTAG_CLR = 3 , IPTAG_TTO = 4 } |
Subcommands for manipulating IPTags. More... | |
enum | bmp_iptag_flags { IPTAG_VALID = 0x8000 , IPTAG_TRANS = 0x4000 , IPTAG_ARP = 0x2000 } |
Flags on IPTags. More... | |
Cortex boot vector formats | |
typedef void(* | handler) (void) |
Type of an interrupt handler. | |
typedef void(* | proc4) (uint32_t, uint32_t, uint32_t, uint32_t) |
Type of a function that takes four arguments. | |
typedef void(* | main_proc) (void *, uint32_t, uint32_t, uint32_t) |
Type of a main entry point. | |
static boot_vec_t *const | boot_vec = (boot_vec_t *) 0 |
Boot vector. | |
cortex_vec_t * | cortex_vec |
Cortex boot vector. | |
bmp_event.c | |
typedef void(* | event_proc) (uint32_t, uint32_t) |
The type of an event handler. | |
void | event_init (uint32_t priority) |
Initialise the event processing system. | |
event_t * | event_new (event_proc proc, uint32_t a1, uint32_t a2) |
Allocates a new event. | |
void | event_set_byte (uint32_t addr, uint32_t data) |
Set a byte at an address. | |
void | event_schedule (event_t *e, uint32_t t) |
Schedules an event to occur some time in the future. | |
void | event_cancel (event_t *e, uint32_t ID) |
Cancel an event that was previously scheduled. | |
void | proc_queue_add (event_t *e) |
Adds an event to a list of events which can (all) be executed at some later time. | |
void | proc_queue_run (void) |
Execute a list of events (in the order in which they were added to the list). | |
Header file for Spin4/Spin5 Board Management Processor (BMP, LPC1768)
struct iptag_t |
IPTag entry (24 bytes)
Data Fields | ||
---|---|---|
uint8_t | ip[4] | IP address of target. |
uint8_t | mac[6] | MAC address of target. |
uint16_t | port | UDP port of target. |
uint16_t | timeout | Timeout (in 10ms ticks) |
uint16_t | flags | Flags (bmp_iptag_flags) |
uint32_t | count | Count of messages sent via IPTag. |
struct sdp_msg_t |
SDP message type definition.
Note that the length field is the number of bytes following the checksum. It will be a minimum of 8 as the SDP header should always be present.
Data Fields | ||
---|---|---|
struct sdp_msg * | next | Next in free list. |
uint16_t | length | length |
uint16_t | checksum | checksum (if used) |
uint8_t | flags | SDP flag byte. |
uint8_t | tag | SDP IPtag. |
uint8_t | dest_port | SDP destination port/CPU. |
uint8_t | srce_port | SDP source port/CPU. |
uint16_t | dest_addr | SDP destination address. |
uint16_t | srce_addr | SDP source address. |
uint16_t | cmd_rc | Command/Return Code. |
uint16_t | seq | Sequence number. |
uint32_t | arg1 | Arg 1. |
uint32_t | arg2 | Arg 2. |
uint32_t | arg3 | Arg 3. |
uint8_t | data[SDP_BUF_SIZE] | User data (256 bytes) |
struct fl_dir_t |
struct ee_data_t |
Data read from EEPROM.
struct board_stat_t |
struct ip_data_t |
struct cortex_vec_t |
Cortex master vector.
Data Fields | ||
---|---|---|
uint32_t * | stack_top | |
main_proc | main | |
handler | NMI | |
handler | HardFault | |
handler | MemManage | |
handler | BusFault | |
handler | UsageFault | |
handler | Rsvd_7 | |
handler | Rsvd_8 | |
handler | Rsvd_9 | |
handler | Rsvd_10 | |
handler | SVC | |
handler | DebugMon | |
handler | Rsvd_13 | |
handler | PendSV | |
handler | SysTickH | |
handler | WDT | |
handler | TIMER0 | |
handler | TIMER1 | |
handler | TIMER2 | |
handler | TIMER3 | |
handler | UART0 | |
handler | UART1 | |
handler | UART2 | |
handler | UART3 | |
handler | PWM1 | |
handler | I2C0 | |
handler | I2C1 | |
handler | I2C2 | |
handler | SPI | |
handler | SSP0 | |
handler | SSP1 | |
handler | PLL0 | |
handler | RTC | |
handler | EINT0 | |
handler | EINT1 | |
handler | EINT2 | |
handler | EINT3 | |
handler | ADC | |
handler | BOD | |
handler | USB | |
handler | CAN | |
handler | DMA | |
handler | I2S | |
handler | ENET | |
handler | RIT | |
handler | MCPWM | |
handler | QEI | |
handler | PLL1 | |
handler | USBActivity | |
handler | CANActivity | |
handler | Rsvd_51 | |
handler | Rsvd_52 | |
uint32_t | build_date | |
uint32_t | sw_ver | |
uint32_t | RO_length | |
uint32_t | RW_length | |
uint32_t * | RO_limit | |
uint32_t * | RW_base | |
uint32_t * | RW_limit | |
uint32_t * | ZI_base | |
uint32_t * | ZI_limit | |
uint32_t * | stack_base | |
uint32_t * | stack_limit |
struct boot_vec_t |
struct event_t |
Record of how to handle an event.
Data Fields | ||
---|---|---|
event_proc | proc | Proc to be called or NULL. |
uint32_t | arg1 | First arg to proc. |
uint32_t | arg2 | Second arg to proc. |
uint32_t | time | Time (CPU ticks) until event due (0 if at head of Q) |
uint32_t | ID | Unique ID for active event (0 if inactive) |
event_t * | next | Next in Q or NULL. |
#define FLASH_WORDS 1024 |
Size of flash buffer (words)
#define LCD_POS | ( | x, | |
y | |||
) | (0x80 + (y) * 64 + (x)) |
LCD cursor position to motion control byte encoder.
[in] | x | Target X location (0..20) |
[in] | y | Target Y location (0..1) |
#define CAN_SIZE 24 |
Number of boards that can be managed over the CAN bus.
This is the maximum number of boards in a frame.
typedef void(* LPC_IAP) (uint32_t *cmd, uint32_t *res) |
LPC17xx In-Application Programming entry point.
[in] | cmd | Command to apply |
[out] | res | Result |
enum bmp_led_code |
enum bmp_gpio_bits |
enum bmp_fpga_command |
Directions for fpga_word()
Enumerator | |
---|---|
FPGA_READ | Read from FPGA. |
FPGA_WRITE | Write to FPGA. |
enum bmp_commands |
Commands supported by the BMP.
enum bmp_type_code |
enum bmp_return_code |
enum bmp_iptag_commands |
enum bmp_iptag_flags |
enum bmp_proc_opcodes |
void event_init | ( | uint32_t | priority | ) |
Initialise the event processing system.
[in] | priority | Priority to use for the driving timer interrupt |
event_t * event_new | ( | event_proc | proc, |
uint32_t | arg1, | ||
uint32_t | arg2 | ||
) |
Allocates a new event.
Allocates a new event from the free queue and intialise "proc", "arg1" and "arg2" fields. The "ID", "next" and "time" fields are also set.
[in] | proc | The event handler |
[in] | arg1 | First argument to pass to proc when event fires |
[in] | arg2 | Second argument to pass to proc when event fires |
NULL
if no event can be allocated void event_set_byte | ( | uint32_t | addr, |
uint32_t | data | ||
) |
Set a byte at an address.
[in] | addr | The address to write at. |
[in] | data | The value to write there. |
void event_schedule | ( | event_t * | e, |
uint32_t | time | ||
) |
Schedules an event to occur some time in the future.
[in] | e | The event to schedule |
[in] | time | How many μs in the future to schedule the event firing at |
void event_cancel | ( | event_t * | e, |
uint32_t | ID | ||
) |
Cancel an event that was previously scheduled.
The ID that was allocated when the event was created must be given in case the event has already executed and possibly been recycled.
It is potentially quite difficult to cancel an event at the head of the event queue so in this case the "proc" is made NULL and the event left to terminate on the timer interrupt.
[in] | e | The event to cancel. |
[in] | ID | The ID that the event is expected to have. |
void proc_queue_add | ( | event_t * | e | ) |
Adds an event to a list of events which can (all) be executed at some later time.
The order of execution is the same as that of addition to the list.
[in] | e | The event to add. |
void proc_queue_run | ( | void | ) |
Execute a list of events (in the order in which they were added to the list).
Events are returned to the free queue after execution.
uint32_t i2c_poll | ( | LPC_I2C_TypeDef *restrict | i2c, |
uint32_t | ctrl | ||
) |
Poll an I2C port.
[in] | i2c | Which I2C port to poll |
[in] | ctrl | Control byte |
uint32_t i2c_receive | ( | LPC_I2C_TypeDef *restrict | i2c, |
uint32_t | ctrl, | ||
uint32_t | addr, | ||
uint32_t | length, | ||
void * | buf | ||
) |
Receive a buffer over I2C.
[in] | i2c | Which I2C port to receive via |
[in] | ctrl | Control word |
[in] | addr | Source address |
[in] | length | Number of bytes to receive |
[in] | buf | Buffer of data to receive into |
uint32_t i2c_send | ( | LPC_I2C_TypeDef *restrict | i2c, |
uint32_t | ctrl, | ||
uint32_t | addr, | ||
uint32_t | length, | ||
const void * | buf | ||
) |
Send a buffer over I2C.
[in] | i2c | Which I2C port to send via |
[in] | ctrl | Control word |
[in] | addr | Destination address |
[in] | length | Number of bytes to write |
[in] | buf | Buffer of data to write |
int16_t read_ts | ( | LPC_I2C_TypeDef *restrict | i2c, |
uint32_t | addr | ||
) |
Read temperature sensor.
[in] | i2c | Which I2C port to use |
[in] | addr | What address to read. (Controls which sensor to read) |
uint32_t read_ee | ( | uint32_t | addr, |
uint32_t | count, | ||
void * | buf | ||
) |
Read from EEPROM.
[in] | addr | Address to read from |
[in] | count | Number of bytes to read |
[in] | buf | Buffer to read into |
uint32_t write_ee | ( | uint32_t | addr, |
uint32_t | count, | ||
const void * | buf | ||
) |
Write to EEPROM.
[in] | addr | Address to write to |
[in] | count | Number of bytes to write |
[in] | buf | Buffer to write from |
void lcd_ctrl | ( | uint32_t | c | ) |
Write a control byte to the LCD.
[in] | c | Control byte to write |
void lcd_putc | ( | uint32_t | c | ) |
Write a character to the LCD. Buffers.
[in] | c | The character to write |
void clock_div | ( | uint32_t | bit_pos, |
uint32_t | value | ||
) |
Configure clock division.
bit_pos | the bit position to configure |
value | the value of that bit |
void delay_us | ( | uint32_t | n | ) |
Delay using a busy loop.
[in] | n | How many μs to delay for |
void delay_ms | ( | uint32_t | n | ) |
Delay using a busy loop.
[in] | n | How many milliseconds to delay for |
void read_adc | ( | void | ) |
Read voltage from an ADC (directly into board_stat_t::adc) and start the read of the next ADC.
This is called approx every 80ms from proc_100hz().
void read_temp | ( | void | ) |
Read I2C temperature sensors and also compute the fan speed.
This routine is called once per second.
void read_fans | ( | void | ) |
Count transitions on the fan sensor inputs.
This routine is called once per millisec and it's assumed that the fan speed is low enough for there to be no more than one transition per ms.
void set_power | ( | uint32_t | state | ) |
Turn board off or on.
[in] | state | State to go into. |
void reset_spin | ( | uint32_t | code | ) |
Resets SpiNNaker by raising/lowering POR and switching the Serial Flash multiplexer as needed when POR falls.
[in] | code | How to do the reset |
code = 0 - lower POR (reset off) code = 1 - raise POR (reset on) code = 2 - pulse POR
If Bit 2 of code is set then the FPGAs are also reset
The Serial Flash is dual ported on Spin5 and the SpiNNaker root chip reads its IP address from it just after it is reset. The read takes about 12ms for the 'standard' IP address block of 32 bytes. If the Serial Flash is set up to contain more code, the delay of 20ms will need to be increased.
void fpga_reset | ( | uint32_t | code | ) |
Reset the FPGAs.
[in] | code | How to do the reset. 0 = clear reset line, 1 = set reset line, 2 = cycle reset line |
uint32_t fpga_init | ( | uint32_t | mask | ) |
Initialise FPGAs.
[in] | mask | Which FPGAs to initialise |
void led_set | ( | uint32_t | leds | ) |
Control the LEDs.
[in] | leds | Encoded packed LED control word. Two bits per LED: 0 = ignore, 1 = toggle, 2 = turn off, 3 = turn on. |
void ssp0_pins | ( | uint32_t | on | ) |
Set up GPIO pins that talk to Flash.
[in] | on | True to enable |
uint32_t cpu_int_off | ( | void | ) |
Disable interrupts.
void cpu_int_restore | ( | uint32_t | cpsr | ) |
Restore interrupts.
[in] | cpsr | old CPSR state to restore |
uint32_t is_blank | ( | const void * | buf, |
uint32_t | len | ||
) |
Check if an area of memory is blank (filled with 0xFF
)
[in] | buf | The address of the area of memory |
[in] | len | The size of the area of memory, in bytes |
0xFF
, false otherwise uint32_t flash_sector | ( | uint32_t | addr | ) |
Convert flash address to sector number (LPC17xx specific)
Sectors 0..15 are 4096 bytes and sectors 16..29 are 32768 bytes
[in] | addr | Address in flash |
uint32_t flash_write | ( | uint32_t | addr, |
uint32_t | length, | ||
const uint32_t * | buffer | ||
) |
Write to flash from supplied buffer. Only writes one sector.
[in] | addr | byte address in flash |
[in] | length | number of bytes to write |
[in] | buffer | data to write |
uint32_t flash_erase | ( | uint32_t | start, |
uint32_t | end | ||
) |
Erase sectors given start and end (byte) addresses.
[in] | start | Starting address |
[in] | end | Ending address |
void proc_power | ( | uint32_t | arg, |
uint32_t | mask | ||
) |
Control power for this board; calls set_power() (and sf_scan() and reset_spin() if powering on)
[in] | arg | target power state and pre-switch delay factor |
[in] | mask | Which boards are being controlled; this function only acts if this board is selected in the mask |
void proc_reset | ( | uint32_t | arg, |
uint32_t | mask | ||
) |
Board reset handler; calls reset_spin()
[in] | arg | reset code and pre-reset delay factor |
[in] | mask | Which boards are being controlled; this function only acts if this board is selected in the mask |
void proc_led | ( | uint32_t | arg, |
uint32_t | mask | ||
) |
uint32_t debug | ( | sdp_msg_t * | msg | ) |
SDP message dispatcher.
[in,out] | msg | The SDP message. Updated to be the response |
Delegates to:
void eth_receive | ( | void | ) |
void copy_ip | ( | const uint8_t *restrict | f, |
uint8_t *restrict | t | ||
) |
Copy IP address.
[in] | f | Where to copy from |
[out] | t | Where to copy to |
void arp_lookup | ( | iptag_t * | iptag | ) |
Request an ARP lookup.
[in] | iptag | The IPTag to do the lookup for |
uint32_t iptag_new | ( | void | ) |
Allocate a transient IPTag.
sdp_msg_t * msg_get | ( | void | ) |
"Allocate" a message from the free message pool
NULL
if the pool is empty uint32_t msg_queue_size | ( | void | ) |
How big is the message queue?
uint32_t msg_queue_insert | ( | sdp_msg_t * | msg | ) |
Insert a message in the message queue.
[in] | msg | The message to enqueue |
sdp_msg_t * msg_queue_remove | ( | void | ) |
Get a message from the head of the message queue and remove it from the queue.
NULL
if the queue is empty void route_msg | ( | sdp_msg_t * | msg | ) |
Route a message to its destination.
[in] | msg | The message to route. Ownership of the message is taken! Caller must not use the message after this. |
uint32_t eth_rx_rdy | ( | void | ) |
Is the ethernet hardware ready to receive?
uint32_t eth_tx_rdy | ( | void | ) |
Is the ethernet hardware ready to transmit?
uint32_t eth_rx_size | ( | void | ) |
Get size of received data.
void eth_copy_txbuf | ( | uint32_t * | buffer, |
uint32_t | length | ||
) |
Copy supplied buffer into transmit hardware.
[in] | buffer | Buffer to copy the message from |
[in] | length | Length of message |
void eth_copy_rxbuf | ( | uint32_t * | buffer, |
uint32_t | length | ||
) |
Copy received message into supplied buffer.
[out] | buffer | Buffer to copy the message into |
[in] | length | Length of message. Buffer must be at least this large. |
void configure_eth | ( | const uint8_t * | mac_addr | ) |
Configure the ethernet hardware.
[in] | mac_addr | The MAC address to use |
void configure_can | ( | uint32_t | id | ) |
Initialises the CAN controller.
[in] | id | Our ID |
uint32_t can_send_msg | ( | uint32_t | dest, |
sdp_msg_t * | msg | ||
) |
Send an SDP message over the CAN.
[in] | dest | Which board to send to |
[in] | msg | The message to send |
void can_timer | ( | void | ) |
This is called every 10ms on all boards.
Non-zero boards just use it to timeout the CAN LED. The zero board uses it to ping all other boards and send them "config1" and "config2"
void can_proc_cmd | ( | uint32_t | dest, |
uint32_t | op, | ||
uint32_t | arg1, | ||
uint32_t | arg2 | ||
) |
Asks another BMP to run a proc from proc_list.
[in] | dest | Who to ask |
[in] | op | Describes what operation to run |
[in] | arg1 | First payload word |
[in] | arg2 | Second payload word |
uint32_t crc32 | ( | void * | buf, |
uint32_t | len, | ||
uint32_t | crc | ||
) |
Compute CRC32 for a buffer of given length.
[in] | buf | the data to compute the CRC of |
[in] | len | number of bytes in buf |
[in] | crc | can be 0xffffffff to start checking, or result of a previous call. |
uint32_t crc32_chk | ( | void * | buf, |
uint32_t | len | ||
) |
Compute the CRC of a buffer.
[in] | buf | the data to compute the CRC of |
[in] | len | number of bytes in buf |
void crc32_buf | ( | void * | buf, |
uint32_t | len | ||
) |
Compute and insert CRC32 of a buffer where the CRC is placed in the last 4 bytes.
[in] | buf | the data to compute the CRC of |
[in] | len | number of bytes in buf |
void io_printf | ( | char * | stream, |
char * | f, | ||
... | |||
) |
Print to an output stream.
[in] | stream | Where to write to. |
[in] | f | The format string |
[in] | ... | Values to fill into the format string |
void ssp0_read | ( | uint32_t | cmd, |
uint32_t | addr, | ||
uint32_t | len, | ||
uint8_t * | buf | ||
) |
Read buffer from Serial Flash.
[in] | cmd | Command for SSP0 |
[in] | addr | Where to read from |
[in] | len | How many bytes to read |
[out] | buf | Buffer to receive read bytes |
void ssp0_write | ( | uint32_t | cmd, |
uint32_t | addr, | ||
uint32_t | len, | ||
const uint8_t * | buf | ||
) |
Write buffer to Serial Flash.
[in] | cmd | Command for SSP0 |
[in] | addr | Where to write to |
[in] | len | How many bytes to write |
[in] | buf | Buffer of bytes to write |
void ssp0_copy | ( | uint32_t | addr, |
uint32_t | len | ||
) |
Copy from Serial Flash on SSP0 to FPGA(s) on SSP1.
[in] | addr | Address of data to move (same address used for all) |
[in] | len | Length of data to move |
void ssp1_copy | ( | uint32_t | count, |
const uint8_t * | buf | ||
) |
Copy buffer to FPGAs.
[in] | count | Number of bytes in buf to copy |
[in] | buf | Buffer containing data to copy |
void sf_read | ( | uint32_t | addr, |
uint32_t | len, | ||
uint8_t * | buf | ||
) |
Read from flash.
[in] | addr | Where to read from |
[in] | len | How many bytes to read |
[out] | buf | The buffer receiving the data |
void sf_write | ( | uint32_t | addr, |
uint32_t | len, | ||
const uint8_t * | buf | ||
) |
Write to flash.
[in] | addr | Where to write to |
[in] | len | How many bytes to write |
[in] | buf | The data to write |
uint32_t sf_crc32 | ( | uint32_t | addr, |
uint32_t | len | ||
) |
Compute CRC of data on flash.
[in] | addr | Where the data is |
[in] | len | The length of the data |
void fpga_word | ( | uint32_t | addr, |
uint32_t | fpga, | ||
uint32_t * | buf, | ||
uint32_t | dir | ||
) |
Read or write an FPGA.
[in] | addr | Where on the FPGA to access |
[in] | fpga | Which FPGA to access |
[in,out] | buf | Buffer; contains word to write to FPGA, or is location to put word read from FPGA |
[in] | dir | Reading (FPGA_READ) or writing (FPGA_WRITE) |
LPC17xx In Application Programming entry point.
|
static |
32 byte (8 word) uninitialised vector
|
static |
64 byte (16 word) uninitialised fault debug vector