Enum Class FPGAMainRegisters
- All Implemented Interfaces:
Serializable
,Comparable<FPGAMainRegisters>
,Constable
Main FPGA registers.
- Author:
- Donal Fellows
- See Also:
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Nested Class Summary
Nested classes/interfaces inherited from class java.lang.Enum
Enum.EnumDesc<E extends Enum<E>>
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Enum Constant Summary
Enum ConstantsEnum ConstantDescriptionCompile flags.Override status LED.Peripheral MC route key.Peripheral MC route mask.Receive equalization.Scrambler on.Enable SpiNNaker chip (2-of-7) link.Transmit driver swing.Transmit pre-emphasis.Top-level design version. -
Field Summary
FieldsModifier and TypeFieldDescriptionstatic final MemoryLocation
Base address of the main registers.final int
The offset of the register within the bank of registers.final int
Size of register, in bits.final boolean
Whether this is a writable register. -
Method Summary
Modifier and TypeMethodDescriptionstatic FPGAMainRegisters
Returns the enum constant of this class with the specified name.static FPGAMainRegisters[]
values()
Returns an array containing the constants of this enum class, in the order they are declared.
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Enum Constant Details
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VERS
Top-level design version. -
FLAG
Compile flags.{ 5: chip scope, 4: peripheral support, 3: ring support, 2: north/south on front, 1-0: FPGA ID }
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PKEY
Peripheral MC route key. (default:0xFFFFFFFF
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PMSK
Peripheral MC route mask. (default:0x00000000
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SCRM
Scrambler on. (default: 0xF){ 3: ring link, 2: peripheral link, 1: board-to-board link1, 0: board-to-board link0 }
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SLEN
Enable SpiNNaker chip (2-of-7) link. (Default:0x00000000
){ 0: Link 0 SpiNN->FPGA enable, 1: Link 0 FPGA->SpiNN enable, 2: Link 1 SpiNN->FPGA enable, 3: Link 1 FPGA->SpiNN enable, ... }
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LEDO
Override status LED. (default:0x0F
){ 7: DIM_RING, 6: DIM_PERIPH, 5: DIM_B2B1, 4: DIM_B2B0, 3: FORCE_ERROR_RING, 2: FORCE_ERROR_PERIPH, 1: FORCE_ERROR_B2B1, 0: FORCE_ERROR_B2B0 }
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RXEQ
Receive equalization. (default:0x0A
){ 7-6: RING_RXEQMIX, 5-4: PERIPH_RXEQMIX, 3-2: B2B1_RXEQMIX, 1-0: B2B0_RXEQMIX }
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TXDS
Transmit driver swing. (default:0x0066
){ 15-12: RING_TXDIFFCTRL, 11-8: PERIPH_TXDIFFCTRL, 7-4: B2B1_TXDIFFCTRL, 3-0: B2B0_TXDIFFCTRL }
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TXPE
Transmit pre-emphasis. (default:0x012
){ 11-9: RING_TXPREEMPHASIS, 8-6: PERIPH_TXPREEMPHASIS, 5-3: B2B1_TXPREEMPHASIS, 2-0: B2B0_TXPREEMPHASIS }
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Field Details
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BASE_ADDRESS
Base address of the main registers. Fixed. -
offset
public final int offsetThe offset of the register within the bank of registers. -
writable
public final boolean writableWhether this is a writable register. -
size
public final int sizeSize of register, in bits.
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Method Details
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values
Returns an array containing the constants of this enum class, in the order they are declared.- Returns:
- an array containing the constants of this enum class, in the order they are declared
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valueOf
Returns the enum constant of this class with the specified name. The string must match exactly an identifier used to declare an enum constant in this class. (Extraneous whitespace characters are not permitted.)- Parameters:
name
- the name of the enum constant to be returned.- Returns:
- the enum constant with the specified name
- Throws:
IllegalArgumentException
- if this enum class has no constant with the specified nameNullPointerException
- if the argument is null
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getAddress
- Returns:
- The address of the register in the FPGA's address space.
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