spinn_phy.h File Reference

Spinnaker support routines for SMC PHY (physical layer ethernet) chip. More...

Go to the source code of this file.

Enumerations
enum	spinn_phy_registers {   PHY_CONTROL = 0 , PHY_STATUS = 1 , PHY_ID1 = 2 , PHY_ID2 = 3 ,   PHY_AUTO_ADV = 4 , PHY_AUTO_LPA = 5 , PHY_AUTO_EXP = 6 , PHY_SI_REV = 16 ,   PHY_MODE_CSR = 17 , PHY_SP_MODE = 18 , PHY_ERR_COUNT = 26 , PHY_SP_CSIR = 27 ,   PHY_INT_SRC = 29 , PHY_INT_MASK = 30 , PHY_SP_CSR = 31 }
	PHY registers. More...

Functions
void	phy_reset (void)
	Reset the PHY chip.
void	phy_write (uint addr, uint data)
	Write to the PHY chip.
uint	phy_read (uint addr)
	Read from the PHY chip.

Detailed Description

Spinnaker support routines for SMC PHY (physical layer ethernet) chip.

Copyright

© The University of Manchester - 2009-2019

Author

Steve Temple, APT Group, School of Computer Science

Enumeration Type Documentation

spinn_phy_registers

enum spinn_phy_registers

PHY registers.

Documentation guessed based on https://github.com/goertzenator/smsc7500/blob/master/smsclan7500.h

Enumerator
PHY_CONTROL	Control register.
PHY_STATUS	Status register.
PHY_ID1	PHY identifier 1 register.
PHY_ID2	PHY identifier 2 register.
PHY_AUTO_ADV	Auto Negotiation Advertisement register.
PHY_AUTO_LPA	Auto Negotiation Link Partner register.
PHY_AUTO_EXP	Auto Negotiation Expansion register.
PHY_MODE_CSR	10/100 Mode Control/Status register
PHY_SP_MODE	10/100 Special Modes register
PHY_ERR_COUNT	Error count register.
PHY_SP_CSIR	Special Control/Status Indication register.
PHY_INT_SRC	Interrupt source register.
PHY_INT_MASK	Interrupt mask register.
PHY_SP_CSR	Special Control/Status register.

Function Documentation

phy_write()

void phy_write	(	uint	addr,
		uint	data
	)

Write to the PHY chip.

Parameters

[in]	addr	The register to write to
[in]	data	The value to write (really a ushort)

phy_read()

uint phy_read

(

uint

addr

)

Read from the PHY chip.

Parameters

[in]

addr

The register to read from

Returns

The read value (really a ushort)