28static uint32_t master_pop_table_length;
40 spin1_memcpy(row_data, result->row_address, result->n_bytes_to_transfer);
45 log_debug(
"Plastic row had entries, so cant be pruned");
52 if (fixed_synapse == 0) {
53 log_debug(
"Plastic and fixed do not have entries, so can be pruned");
56 log_debug(
"Fixed row has entries, so cant be pruned");
65 for (uint32_t i = 0; i < bitfield_filters->
n_filters; i++) {
68 int i_atoms = filters[i].
n_atoms;
69 int i_words = get_bit_field_size(i_atoms);
70 if (i_atoms == count_bit_field(filters[i].data, i_words)) {
79 uint32_t *n_atom_data,
void *synaptic_matrix,
void *structural_matrix,
83 uint32_t *bit_field_words_location = (uint32_t *)
84 &bitfield_filters->
filters[master_pop_table_length];
88 log_info(
"Generating %u bitfields", master_pop_table_length);
89 for (uint32_t i = 0; i < master_pop_table_length; i++) {
93 uint32_t n_words = get_bit_field_size(
n_neurons);
97 if (bit_field ==
NULL) {
98 log_error(
"Could not allocate dtcm for bit field");
101 clear_bit_field(bit_field, n_words);
105 if (structural_matrix !=
NULL) {
108 uint32_t dummy1 = 0, dummy2 = 0, dummy3 = 0, dummy4 = 0;
110 &dummy1, &dummy2, &dummy3, &dummy4)) {
111 for (uint32_t n = 0; n <
n_neurons; n++) {
112 bit_field_set(bit_field, n);
118 uint32_t pos = mp_entry.
start;
119 for (uint32_t j = mp_entry.
count; j > 0; j--, pos++) {
130 for (uint32_t n = 0; n <
n_neurons; n++) {
133 if (bit_field_test(bit_field, n)) {
143 bit_field_set(bit_field, n);
154 spin1_memcpy(&bit_field_words_location[position], bit_field,
155 n_words *
sizeof(uint32_t));
156 bitfield_filters->
filters[i].
data = &bit_field_words_location[position];
167 bitfield_filters->
n_filters = master_pop_table_length;
173 uint32_t *n_atom_data_sdram,
void *master_pop,
174 void *synaptic_matrix,
void *bitfield_filters,
void *structural_matrix) {
177 master_pop_table_length =
config->table_length;
179 if (master_pop_table_length == 0) {
183 master_pop_table = &
config->data[0];
186 uint32_t n_atom_bytes = master_pop_table_length *
sizeof(uint32_t);
187 uint32_t *n_atom_data = spin1_malloc(n_atom_bytes);
188 if (n_atom_data ==
NULL) {
189 log_error(
"Couldn't allocate memory for key_to_max_atoms");
192 spin1_memcpy(n_atom_data, n_atom_data_sdram, n_atom_bytes);
196 synaptic_row_t row_data = spin1_malloc(row_max_n_words *
sizeof(uint32_t));
197 if (row_data ==
NULL) {
198 log_error(
"Could not allocate dtcm for the row data");
205 if (structural_matrix !=
NULL) {
211 structural_matrix, &
pre_info, row_data)) {
212 log_error(
"Failed to generate bit fields");
bit_field_t bit_field_alloc(uint32_t n_atoms)
static void determine_redundancy(filter_region_t *bitfield_filters)
Determine which bit fields are redundant.
static bool do_bitfield_generation(uint32_t *n_atom_data_sdram, void *master_pop, void *synaptic_matrix, void *bitfield_filters, void *structural_matrix)
Entry point.
static bool generate_bit_field(filter_region_t *bitfield_filters, uint32_t *n_atom_data, void *synaptic_matrix, void *structural_matrix, pre_pop_info_table_t *pre_info, synaptic_row_t row_data)
Create the bitfield for this master pop table and synaptic matrix.
static bool do_sdram_read_and_test(synaptic_row_t row_data, pop_table_lookup_result_t *result)
Read row and test if there are any synapses.
void log_error(const char *message,...)
void log_debug(const char *message,...)
void log_info(const char *message,...)
uint32_t n_atoms_per_core
struct synaptic_row * synaptic_row_t
The type of a synaptic row.
static uint32_t n_neurons
The number of neurons on the core.
Master pop(ulation) table API.
uint32_t key
The key to match against the incoming message.
uint32_t count
The number of entries in address_list for this entry.
uint32_t n_neurons
The number of neurons per core.
uint32_t address
the address
static void get_row_addr_and_size(address_list_entry item, uint32_t synaptic_rows_base_address, uint32_t neuron_id, pop_table_lookup_result_t *result)
Get the row address and size for a given neuron.
#define INVALID_ADDRESS
An Invalid address and row length.
uint32_t mask_shift
The shift to apply to the key to get the core part.
uint32_t start
The index into address_list for this entry.
A packed address and row length (note: same size as extra info)
An entry in the master population table.
The memory layout in SDRAM of the first part of the population table configuration....
A structure to hold a response to a population table lookup.
void sark_free(void *ptr)
void rt_error(uint code,...)
Miscellaneous structures.
static uint8_t * sp_structs_read_in_common(address_t sdram_sp_address, rewiring_data_t *rewiring_data, pre_pop_info_table_t *pre_info, post_to_pre_entry **post_to_pre_table)
Common code for structural plasticity initialisation.
static bool sp_structs_find_by_spike(const pre_pop_info_table_t *pre_pop_info_table, spike_t spike, uint32_t *restrict neuron_id, uint32_t *restrict population_id, uint32_t *restrict sub_population_id, uint32_t *restrict m_pop_index)
unpack the spike into key and identifying information for the neuron; Identify pop,...
Entry of map from post-connection to pre-connection neural indices.
table of individual pre-synaptic information
parameters of the synaptic rewiring model
void spin1_memcpy(void *dst, void const *src, uint len)
implementation for handling the processing of synapse rows.
static synapse_row_fixed_part_t * synapse_row_fixed_region(synaptic_row_t row)
Get the address of the non-plastic (or fixed) region.
static size_t synapse_row_num_fixed_synapses(const synapse_row_fixed_part_t *fixed)
Get the number of fixed synapses in the row.
static size_t synapse_row_plastic_size(const synaptic_row_t row)
Get the size of the plastic region.
#define N_SYNAPSE_ROW_HEADER_WORDS
Number of header words per synaptic row.
The type of the fixed part of the row. The fixed-plastic part follows.
rewiring_data_t rewiring_data
the instantiation of the rewiring data
pre_pop_info_table_t pre_info
pre-population information table
static post_to_pre_entry * post_to_pre_table
inverse of synaptic matrix