spin1_api_params.h File Reference

SpiNNaker API internal parameters and function prototypes. More...

Go to the source code of this file.

Data Structures
struct	copy_t
	Describes a DMA transfer. More...
struct	dma_queue_t
	The queue of DMA transfers. More...
struct	packet_t
	A multicast packet. More...
struct	tx_packet_queue_t
	The queue of multicast packets to be sent. More...
struct	user_event_t
	Describes the parameters to pass to a user event. More...
struct	user_event_queue_t
	The type of the fixed-capacity queue of user events. More...
struct	cback_t
	An external interrupt handler. More...
struct	task_t
	An internal interrupt/callback handler. More...
struct	task_queue_t
	The queue of callbacks to do. More...

Macros
#define	API_WARN   TRUE
	print warnings at end of simulation
#define	API_DEBUG   TRUE
	print debug messages
#define	API_DIAGNOSTICS   TRUE
	make diagnostics available to the application
#define	NON_ROOT   FALSE
#define	API_PRINT_DLY   200
	suggested delay (in μs) between calls to io_printf()
#define	DMA_BURST_SIZE   4
	DMA transfer parameters: 16-doubleword bursts.
#define	DMA_WIDTH   1
	DMA transfer parameters: 16-doubleword bursts.
#define	DMA_QUEUE_SIZE   16
	internal DMA queue size
#define	USE_WRITE_BUFFER   FALSE
	select write buffer use
#define	TX_PACKET_QUEUE_SIZE   16
	Size of outbound packet queue.
#define	TX_TCR_MCDEFAULT   0x00000000
	Default transmit control register value for multicast messages.
#define	TX_FULL_MASK   0x40000000
	Transmit hardware full mask.
#define	TX_EMPTY_MASK   0x80000000
	Transmit hardware empty mask.
#define	RX_RECEIVED_MASK   0x80000000
	Message received mask.
#define	USER_EVENT_QUEUE_SIZE   4
	internal user event queue size
#define	RTS_STACKS   4096
	memory space reserved for RTS stacks
#define	CHIP_ADDR(x, y)   ((x << 8) | y)
	The address of a chip.
#define	P2P_ROUTE(addr)   (1 << p2p_get(addr))
	A peer-to-peer route.
#define	CORE_ROUTE(core)   (1 << (core + NUM_LINKS))
	The route to a core on the current chip.

Typedefs
typedef void(*	isr_t) (void)
	interrupt service routine

Enumerations
enum	spin1_api_link_orientations {   EAST = 0 , NORTH_EAST = 1 , NORTH = 2 , WEST = 3 ,   SOUTH_WEST = 4 , SOUTH = 5 }
	link orientation codes
enum	spin1_api_error_codes {   NO_ERROR = 0 , TASK_QUEUE_FULL = 1 , DMA_QUEUE_FULL = 2 , PACKET_QUEUE_FULL = 4 ,   WRITE_BUFFER_ERROR = 8 , SYNCHRO_ERROR = 16 }
	internal error/warning return codes
enum	spin1_api_callback_queue_params { N_TASK_QUEUES = 4 , NUM_PRIORITIES = 5 , TASK_QUEUE_SIZE = 16 }
	callback queue parameters More...
enum	spin1_api_multicast_entries { SYS_MC_ENTRIES = 1 , APP_MC_ENTRIES = (MC_TABLE_SIZE - SYS_MC_ENTRIES) }
	Allocation of entries in MC table.
enum	spin1_api_vic_priorties {   SARK_PRIORITY = 0 , TIMER2_PRIORITY = 1 , TIMER1_PRIORITY = 2 , DMA_DONE_PRIORITY = 3 ,   RX_READY_PRIORITY = 4 , FR_READY_PRIORITY = 5 , CC_TMT_PRIORITY = 6 , SOFT_INT_PRIORITY = 7 ,   DMA_ERR_PRIORITY = 8 }
	VIC priorities. More...

Variables
cback_t	callback [NUM_EVENTS]
	The external interrupt handlers.
static volatile isr_t *const	vic_vectors = (isr_t *) (VIC_BASE + 0x100)
	VIC vector table.
static volatile uint *const	vic_controls = (uint *) (VIC_BASE + 0x200)
	VIC control table.

Detailed Description

SpiNNaker API internal parameters and function prototypes.

Author

Luis Plana - lap@c.nosp@m.s.ma.nosp@m.n.ac..nosp@m.uk Thomas Sharp - thoma.nosp@m.s.sh.nosp@m.arp@c.nosp@m.s.ma.nosp@m.n.ac..nosp@m.uk

Date

03 May 2011

Copyright

© The University of Manchester, 2011. All rights reserved. SpiNNaker Project Advanced Processor Technologies Group School of Computer Science

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Data Structure Documentation

copy_t

struct copy_t

Describes a DMA transfer.

Data Fields
uint	id	ID.
uint	tag	User label.
uint *	system_address	Address in SDRAM (or other shared memory)
uint *	tcm_address	Address in local TCM.
uint	description	Control descriptor.

dma_queue_t

struct dma_queue_t

The queue of DMA transfers.

Implemented as a circular buffer

Data Fields
uint	start	Index of first transfer.
uint	end	Index of last transfer
copy_t	queue[DMA_QUEUE_SIZE]	Array holding transfer descriptors.

packet_t

struct packet_t

A multicast packet.

Data Fields
uint	key	The MC packet key.
uint	data	The MC packet payload (if defined)
uint	TCR	The MC packet control word.

tx_packet_queue_t

struct tx_packet_queue_t

The queue of multicast packets to be sent.

Implemented as a circular buffer

Data Fields
uint	start	Index of first packet.
uint	end	Index of last packet
packet_t	queue[TX_PACKET_QUEUE_SIZE]	Array holding packet descriptors.

user_event_t

struct user_event_t

Describes the parameters to pass to a user event.

Data Fields
uint	arg0	The first arbitrary parameter.
uint	arg1	The second arbitrary parameter.

user_event_queue_t

struct user_event_queue_t

The type of the fixed-capacity queue of user events.

Implemented as a circular buffer.

Data Fields
uint	start	Index of first event.
uint	end	Index of last event
user_event_t	queue[USER_EVENT_QUEUE_SIZE]	Array holding event descriptors.

cback_t

struct cback_t

An external interrupt handler.

Data Fields
callback_t	cback	Pointer to the function to call.
int	priority	The interrupt priority.

task_t

struct task_t

An internal interrupt/callback handler.

Data Fields
callback_t	cback	Pointer to the function to call.
uint	arg0	The first arbitrary parameter.
uint	arg1	The second arbitrary parameter.

task_queue_t

struct task_queue_t

The queue of callbacks to do.

Implemented as a circular buffer

Data Fields
uint	start	Index of first task.
uint	end	Index of last task
task_t	queue[TASK_QUEUE_SIZE]	Array holding task descriptors.

Macro Definition Documentation

NON_ROOT

#define NON_ROOT   FALSE

Deprecated:

No definition available

CHIP_ADDR

#define CHIP_ADDR	(		x,
			y
	)		((x << 8) | y)

The address of a chip.

Parameters

[in]	x	X coordinate of the chip
[in]	y	Y coordinate of the chip

Returns

The packed chip coordinates

P2P_ROUTE

#define P2P_ROUTE

(

addr

)

(1 << p2p_get(addr))

A peer-to-peer route.

Parameters

[in]

addr

The address of the chip

Returns

The route bit to that chip

CORE_ROUTE

#define CORE_ROUTE

(

core

)

(1 << (core + NUM_LINKS))

The route to a core on the current chip.

Parameters

[in]

core

The core to route to

Returns

The route bit to that core

Enumeration Type Documentation

spin1_api_callback_queue_params

enum spin1_api_callback_queue_params

callback queue parameters

Enumerator
N_TASK_QUEUES	Number of priorities - 1 because priority 0 is not queued
NUM_PRIORITIES	Number of priorities.
TASK_QUEUE_SIZE	Size of task queue.

spin1_api_vic_priorties

enum spin1_api_vic_priorties

VIC priorities.

Enumerator
SARK_PRIORITY	Communication with SARK/SCAMP.
TIMER2_PRIORITY	Timer 2 interrupt (events)
TIMER1_PRIORITY	Timer interrupt.
DMA_DONE_PRIORITY	DMA complete.
RX_READY_PRIORITY	Multicast message ready to receive.
FR_READY_PRIORITY	Fixed route message ready to receive.
CC_TMT_PRIORITY	Comms controller timeout.
SOFT_INT_PRIORITY	Software-driven interrupt.
DMA_ERR_PRIORITY	DMA error.

Variable Documentation

callback

cback_t callback[NUM_EVENTS]

extern

The external interrupt handlers.

The external interrupt handlers.

Warning

SARK knows about this variable!